The present disclosure relates, in various embodiments, to formulations and processes suitable for use in electronic devices, such as thin film transistors (“TFT”s). The present disclosure also relates to components or layers produced using such compositions and processes, as well as electronic devices containing such materials.
Thin film transistors (TFTs) are fundamental components in modern-age electronics, including, for example, sensors, image scanners, and electronic display devices. TFTs are generally composed of a supporting substrate, three electrically conductive electrodes (gate, source and drain electrodes), a channel semiconducting layer, and an electrically insulating gate dielectric layer separating the gate electrode from the semiconducting layer. It is generally desired to make TFTs which have not only much lower manufacturing costs, but also appealing mechanical properties such as being physically compact, lightweight, and flexible. One approach is through organic thin-film transistors (“OTFT”s), wherein one or more components of the TFT includes organic compounds. In particular, some components can be deposited and patterned using inexpensive, well-understood printing technology.
Inkjet printing is believed to be a very promising method to fabricate OTFTs. As to the fabrication process, inkjet printing the organic semiconductor is a critical step. Accordingly, a jettable semiconductor ink is required.
One general approach to form an ink composition is to dissolve a semiconducting material in a proper solvent to form an ink solution for dispersion. The dispersion is typically suitable for printing the semiconducting material in a bottom-gate TFT configuration (see FIG. 1) wherein the substrate surface (the dielectric surface) has a low surface energy. However, the ink composition may not meet all requirements for inkjet printing, such as surface tension requirements. For example, the surface tension of some dispersions is too low for printing the semiconducting material on to a substrate with high surface energy such as in a top-gate TFT configuration (see FIG. 4). Low surface tension induces the semiconducting material to spread beyond the desired channel area, causing undesired capacitance. It would be desirable to provide a semiconducting ink formulation which has increased surface tension without changing the structure, molecular weight, and/or loading of the semiconducting material itself.